Virtual-Memory Buffer Management for Tiered Memory

This episode explores a Purdue systems paper on extending virtual-memory-assisted database buffer management from the classic DRAM–disk setup to modern multi-tier memory hierarchies that include local DRAM, remote or disaggregated memory, and NVMe storage. It explains how the approach replaces traditional page-ID-to-frame hash lookups with fixed virtual addresses backed by page tables, aiming to cut CPU overhead that increasingly dominates in in-memory database workloads. The discussion connects this design to broader trends like memory disaggregation, NUMA/CXL-style pooled memory, and prior systems such as vmcache, Infiniswap, and AIFM, while arguing that database-aware placement policies matter because transparent OS paging alone is usually too blunt. Listeners would find it interesting for its concrete look at how OS mechanisms, hardware trends, and database internals are converging to make memory management a first-class performance problem.

Sources:
1. Virtual-Memory Buffer Management for Tiered Memory
https://arxiv.org/pdf/2603.03271
2. Infiniswap: Fast RDMA-Based Memory Virtualization — Juncheng Gu, Youngmoon Lee, Yiwen Zhang, Mosharaf Chowdhury, Kang G. Shin, 2017
https://scholar.google.com/scholar?q=Infiniswap%3A+Fast+RDMA-Based+Memory+Virtualization
3. AIFM: High-Performance, Application-Integrated Far Memory — Juncheng Gu, Yuhan Yang, Youngmoon Lee, Mosharaf Chowdhury, Kang G. Shin, 2020
https://scholar.google.com/scholar?q=AIFM%3A+High-Performance%2C+Application-Integrated+Far+Memory
4. Characterizing and Managing Remote Memory in Datacenters — Anirudh Badam, Vivek S. Pai, K. K. Ramakrishnan, et al., 2021
https://scholar.google.com/scholar?q=Characterizing+and+Managing+Remote+Memory+in+Datacenters
5. Transparent Page Placement for CXL-Enabled Tiered-Memory — Siyuan Liu, et al., 2023
https://scholar.google.com/scholar?q=Transparent+Page+Placement+for+CXL-Enabled+Tiered-Memory
6. Virtual Memory Assisted Buffer Management — Viktor Leis, Florian Haas, Alfons Kemper, Thomas Neumann, 2013
https://scholar.google.com/scholar?q=Virtual+Memory+Assisted+Buffer+Management
7. LeanStore: In-Memory Data Management Beyond Main Memory — Viktor Leis, et al., 2018
https://scholar.google.com/scholar?q=LeanStore%3A+In-Memory+Data+Management+Beyond+Main+Memory
8. Pointer Swizzling at Page Fault Time: Efficiently and Transparently Supporting Huge Address Spaces on Standard Hardware — Paul R. Wilson, 1991
https://scholar.google.com/scholar?q=Pointer+Swizzling+at+Page+Fault+Time%3A+Efficiently+and+Transparently+Supporting+Huge+Address+Spaces+on+Standard+Hardware
9. LIPAH: A Lightweight In-Place Address Hashing Buffer Manager — database systems researchers including work cited by the paper, 2020
https://scholar.google.com/scholar?q=LIPAH%3A+A+Lightweight+In-Place+Address+Hashing+Buffer+Manager
10. The Linux Kernel's NUMA Memory Policy and Page Migration Mechanisms — Linux kernel community, including Andi Kleen, Lee Schermerhorn, Mel Gorman and others across documentation and implementation work, 2000s-2010s
https://scholar.google.com/scholar?q=The+Linux+Kernel%27s+NUMA+Memory+Policy+and+Page+Migration+Mechanisms
11. AutoNUMA: Automatic NUMA Balancing in the Linux Kernel — Linux kernel contributors including Andrea Arcangeli and others, 2012
https://scholar.google.com/scholar?q=AutoNUMA%3A+Automatic+NUMA+Balancing+in+the+Linux+Kernel
12. Nimble Page Management for Tiered Memory Systems — various recent systems researchers, 2021
https://scholar.google.com/scholar?q=Nimble+Page+Management+for+Tiered+Memory+Systems
13. Software-Defined Far Memory in Warehouse-Scale Computers — various datacenter systems researchers, 2020-2022
https://scholar.google.com/scholar?q=Software-Defined+Far+Memory+in+Warehouse-Scale+Computers
14. Memory Pooling with CXL: Opportunities and Challenges — industry and academic coauthors across architecture venues, 2022-2024
https://scholar.google.com/scholar?q=Memory+Pooling+with+CXL%3A+Opportunities+and+Challenges
15. The Design and Implementation of the io_uring Interface — Jens Axboe and Linux kernel community, 2019
https://scholar.google.com/scholar?q=The+Design+and+Implementation+of+the+io_uring+Interface
16. Userfaultfd: A Mechanism for Delegating Page-Fault Handling to User Space — Linux kernel community, 2015
https://scholar.google.com/scholar?q=Userfaultfd%3A+A+Mechanism+for+Delegating+Page-Fault+Handling+to+User+Space
17. DAX: Direct Access to Persistent Memory — Linux kernel and filesystem community, 2014-2016
https://scholar.google.com/scholar?q=DAX%3A+Direct+Access+to+Persistent+Memory
18. Arrakis: The Operating System is the Control Plane — Peter Druschel, Antoine Kaufmann, Baris Kasikci, et al., 2014
https://scholar.google.com/scholar?q=Arrakis%3A+The+Operating+System+is+the+Control+Plane
19. vmcache: Buffer Management Using Virtual Memory — likely the prior vmcache authors cited as [22], not specified in excerpt
https://scholar.google.com/scholar?q=vmcache%3A+Buffer+Management+Using+Virtual+Memory
20. Hyrise — authors cited as [29], not specified in excerpt
https://scholar.google.com/scholar?q=Hyrise
21. LIPAH — authors cited as [27, 28], not specified in excerpt
https://scholar.google.com/scholar?q=LIPAH
22. Pointer Swizzling in Database Systems — e.g. the works cited as [12, 24, 26], not specified in excerpt
https://scholar.google.com/scholar?q=Pointer+Swizzling+in+Database+Systems
23. mmap-based Tiered Buffer Pool Designs — e.g. works cited as [14, 38], not specified in excerpt
https://scholar.google.com/scholar?q=mmap-based+Tiered+Buffer+Pool+Designs
24. Traditional Hash-Table Buffer Pool Designs for Tiered Memory — e.g. work cited as [32], not specified in excerpt
https://scholar.google.com/scholar?q=Traditional+Hash-Table+Buffer+Pool+Designs+for+Tiered+Memory
25. Linux move_pages / mbind NUMA Memory Management Interfaces — Linux kernel / man-page and implementation lineage, ongoing
https://scholar.google.com/scholar?q=Linux+move_pages+%2F+mbind+NUMA+Memory+Management+Interfaces
26. Recent Memory Disaggregation and Tiered Memory Papers cited as [1, 3, 5, 13, 14, 16, 21, 25, 31, 33, 37] — various, recent
https://scholar.google.com/scholar?q=Recent+Memory+Disaggregation+and+Tiered+Memory+Papers+cited+as+%5B1%2C+3%2C+5%2C+13%2C+14%2C+16%2C+21%2C+25%2C+31%2C+33%2C+37%5D
27. Nomad: Non-Exclusive Memory Tiering via Transactional Page Migration — approx. recent systems authors; exact list not verified from snippet, 2024/2025
https://scholar.google.com/scholar?q=Nomad%3A+Non-Exclusive+Memory+Tiering+via+Transactional+Page+Migration
28. Beyond Page Migration: Enhancing Tiered Memory Performance via Integrated Last-Level Cache Management and Page Migration — approx. recent architecture/systems authors; exact list not verified from snippet, 2024/2025
https://scholar.google.com/scholar?q=Beyond+Page+Migration%3A+Enhancing+Tiered+Memory+Performance+via+Integrated+Last-Level+Cache+Management+and+Page+Migration
29. FlexMem: Adaptive Page Profiling and Migration for Tiered Memory — approx. recent systems authors; exact list not verified from snippet, 2024/2025
https://scholar.google.com/scholar?q=FlexMem%3A+Adaptive+Page+Profiling+and+Migration+for+Tiered+Memory
30. Genie Cache: Non-blocking Miss Handling and Replacement in Page-Table-Based DRAM Cache — approx. recent architecture authors; exact list not verified from snippet, 2024/2025
https://scholar.google.com/scholar?q=Genie+Cache%3A+Non-blocking+Miss+Handling+and+Replacement+in+Page-Table-Based+DRAM+Cache
31. NDPage: Efficient Address Translation for Near-Data Processing Architectures via Tailored Page Table — approx. recent architecture authors; exact list not verified from snippet, 2024/2025
https://scholar.google.com/scholar?q=NDPage%3A+Efficient+Address+Translation+for+Near-Data+Processing+Architectures+via+Tailored+Page+Table
32. Improving the Locality of Page Table Walks in the Cache Hierarchy of Modern Microprocessors — approx. recent microarchitecture authors; exact list not verified from snippet, 2024/2025
https://scholar.google.com/scholar?q=Improving+the+Locality+of+Page+Table+Walks+in+the+Cache+Hierarchy+of+Modern+Microprocessors
33. PaCaR: Improved Buffered I/O Locality on NUMA Systems with Page Cache Replication — approx. recent OS/systems authors; exact list not verified from snippet, 2024/2025
https://scholar.google.com/scholar?q=PaCaR%3A+Improved+Buffered+I%2FO+Locality+on+NUMA+Systems+with+Page+Cache+Replication
34. Cache Coherence Over Disaggregated Memory — approx. recent systems/architecture authors; exact list not verified from snippet, 2024/2025
https://scholar.google.com/scholar?q=Cache+Coherence+Over+Disaggregated+Memory
35. AI Post Transformers: FlexGen: High-Throughput LLM Inference on a Single GPU — Hal Turing & Dr. Ada Shannon, Mon,
https://podcast.do-not-panic.com/episodes/flexgen-high-throughput-llm-inference-on-a-single-gpu/
36. AI Post Transformers: HybridServe: Efficient LLM Inference with Hybrid Caching — Hal Turing & Dr. Ada Shannon, Mon,
https://podcast.do-not-panic.com/episodes/hybridserve-efficient-llm-inference-with-hybrid-caching/
37. AI Post Transformers: Continuous Batching for LLM Inference: Throughput and Latency Gains — Hal Turing & Dr. Ada Shannon, Mon,
https://podcast.do-not-panic.com/episodes/continuous-batching-for-llm-inference-throughput-and-latency-gains/
38. AI Post Transformers: ByteCheckpoint: A Unified LLM Checkpointing System — Hal Turing & Dr. Ada Shannon, Thu,
https://podcast.do-not-panic.com/episodes/bytecheckpoint-a-unified-llm-checkpointing-system/
39. AI Post Transformers: LithOS: Operating System for Efficient GPU Machine Learning — Hal Turing & Dr. Ada Shannon, Sun,
https://podcast.do-not-panic.com/episodes/lithos-operating-system-for-efficient-gpu-machine-learning/